Comments on "An Algorithm for Synthesis of Multiple-Output Combinational Logic"
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چکیده
Comments on "An Algorithm for Synthesis of Multiple-Output Combinational Logic" EDWARD S. DAVIDSON, MEMBER, IEEE AND GERNOT METZE, MEMBER, IEEE Abstract-The principal synthesis example of Schneider and Dietmeyer's paper [1] is examined by applying a new synthesis algorithm. The minimum NOR gate realization thus obtained is used to illustrate the nonoptimality of their approach and to question their definition of delay. Arguments are advanced for synthesis with simple modules.
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Remarks on "Comments on 'An Algorithm for Synthesis of Multiple-Output Combinational Logic'"
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ورودعنوان ژورنال:
- IEEE Trans. Computers
دوره 17 شماره
صفحات -
تاریخ انتشار 1968